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1 features ? high-performance, high-density, electrically-erasable programmable logic device fully connected logic array with 416 product terms 10 ns maximum pin-to-pin delay for 5v operation low-power edge-sensing ?l? option with <1 ma standby current 24 flexible output macrocells ? 48 flip-flops ? two per macrocell ?72 sum terms ? all flip-flops, i/o pins feed in independently d- or t-type flip-flops product term or direct input pin clocking registered or combinatorial internal feedback backward compatible with atv2500b/bql and atv2500h/l software advanced electrically-erasable technology ? reprogrammable ? 100% tested 44-lead surface mount package block diagram description the atf2500c is the highest-density pld available in a 44-pin package. with its fully connected logic array and flexible macrocell structure, high gate utilization is easily obtainable. the atf2500c is a high-performance cmos (electrically-erasable) pro- grammable logic device (pld) that utilizes atmel?s proven electrically-erasable technology. atf2500c cpld family datasheet atf2500c atf2500cl atf2500cq atf2500cql preliminary rev. 0777g?12/01 pin configurations pin name function in logic inputs clk/in pin clock and input i/o bi-directional buffers i/o 0,2,4... ?even? i/o buffers i/o 1,3,5... ?odd? i/o buffers gnd ground vcc +5v supply dip 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 in in in i/o0 i/o1 i/o2 i/o3 i/o4 i/o5 vcc i/o17 i/o16 i/o15 i/o14 i/o13 i/o12 in in in in in in in in i/o6 i/o7 i/o8 i/o9 i/o10 i/o11 gnd i/o23 i/o22 i/o21 i/o20 i/o19 i/o18 in in in plcc/lcc/jlcc 7 8 9 10 11 12 13 14 15 16 17 39 38 37 36 35 34 33 32 31 30 29 i/o2 i/o3 i/o4 i/o5 vcc vcc i/o17 i/o16 i/o15 i/o14 i/o13 i/o7 i/o8 i/o9 i/o10 i/o11 gnd gnd i/o23 i/o22 i/o21 i/o20 6 5 4 3 2 1 44 43 42 41 40 18 19 20 21 22 23 24 25 26 27 28 i/o12 in in in in in in in in i/o18 i/o19 i/o1 i/o0 gnd in in clk/in in in in in i/o6 note: for atf2500cq and atf2500cql (plcc/lcc/jlcc packages) pin 4 and pin 26 gnd connections are not required.
2 atf2500c family 0777g?12/01 the atf2500c is organized around a single universal array. all pins and feedback terms are always available to every macrocell. each of the 38 logic pins are array inputs, as are the out- puts of each flip-flop. in the atf2500c, four product terms are input to each sum term. furthermore, each macro- cell?s three sum terms can be combined to provide up to 12 product terms per sum term with no performance penalty. each flip-flop is individually selectable to be either d- or t-type, pro- viding further logic compaction. also, 24 of the flip-flops may be bypassed to provide internal combinatorial feedback to the logic array. product terms provide individual clocks and asynchronous resets for each flip-flop. the flip- flops may also be individually configured to have direct input pin clocking. each output has its own enable product term. eight synchronous preset product terms serve local groups of either four or eight flip-flops. register preload functions are provided to simplify testing. all registers automatically reset upon power-up. the atmel-unique ?l? low-power feature is an edge-sensing option that is now field program- mable for the atf2500c family. the ?l? feature utilizes atmel-patented input transition detection (itd) circuitry and is activated by selecting the ?l? option from the program menu. using the atf2500c family?s many advanced features the atf2500cs advanced flexibility packs more usable gates into 44 leads than other plds. some of the atf2500cs key features are: fully connected logic array ? each array input is always available to every product term. this makes logic placement a breeze. selectable d- and t-type registers ? each atf2500c flip-flop can be individually configured as either d- or t-type. using the t-type configuration, jk and sr flip-flops are also easily created. these options allow more efficient product term usage. buried combinatorial feedback ? each macrocell?s q2 register may be bypassed to feed its input (d/t2) directly back to the logic array. this provides further logic expansion capability without using precious pin resources. selectable synchronous/asynchronous clocking ? each of the atf2500cs flip-flops has a dedicated clock product term. this removes the constraint that all registers use the same clock. buried state machines, counters and registers can all coexist in one device while running on separate clocks. individual flip-flop clock source selection further allows mixing higher performance pin clocking and flexible product term clocking within one design. a total of 48 registers ? the atf2500c provides two flip-flops per macrocell ? a total of 48. each register has its own clock and reset terms, as well as its own sum term. independent i/o pin and feedback paths ? each i/o pin on the atf2500c has a dedicated input path. each of the 48 registers has its own feedback term into the array as well. these features, combined with individual product terms for each i/o?s output enable, facilitate true bi-directional i/o design. combinable sum terms ? each output macrocell?s three sum terms may be combined into a single term. this provides a fan in of up to 12 product terms per sum term with no speed penalty.
3 atf2500c family 0777g?12/01 power-up reset the registers in the atf2500cs are designed to reset during power-up. at a point delayed slightly from v cc crossing v rst , all registers will be reset to the low state. the output state will depend on the polarity of the output buffer. this feature is critical for state as nature of reset and the uncertainty of how v cc actually rises in the system, the following conditions are required: 1. the v cc rise must be monotonic, 2. after reset occurs, all input and feedback setup times must be met before driving the clock pin or terms high, and 3. the clock pin, and any signals from which clock terms are derived, must remain stable during t pr . parameter description typ max units t pr power-up reset time 600 1000 ns v rst power-up reset voltage 3.8 4.5 v level forced on odd i/o pin during preload cycle q select pin state even/odd select even q1 state after cycle even q2 state after cycle odd q1 state after cycle odd q2 state after cycle v ih /v il low low high/low x x x v ih /v il high low x high/low x x v ih /v il low high x x high/low x v ih /v il high high x x x high/low
4 atf2500c family 0777g?12/01 preload and observability of registered outputs the atf2500cs registers are provided with circuitry to allow loading of each register asyn- chronously with either a high or a low. this feature will simplify testing since any state can be forced into the registers to control test sequencing. a v ih level on the odd i/o pins will force the appropriate register high; a v il will force it low, independent of the polarity or other configura- tion bit settings. the preload state is entered by placing an 10.25v to 10.75v signal on smp lead 42. when the preload clock smp lead 23 is pulsed high, the data on the i/o pins is placed into the 12 registers chosen by the q select and even/odd select pins. register 2 observability mode is entered by placing an 10.25v to 10.75v signal on pin/lead 2. in this mode, the contents of the buried register bank will appear on the associated outputs when the oe control signals are active. programming software support all family members of the atf2500c can be designed with atmel-synario ? and atmel-win- cupl ? . prochip ? designer support will be available q102. additionally, the atf2500c may be programmed to perform the atv2500h/ls functional sub- set (no t-type flip-flops, pin clocking or d/t2 feedback) using the atv2500h/l jedec file. in this case, the atf2500c becomes a direct replacement or speed upgrade for the atv2500h/l. the atf2500cq/cql are direct replacements for the atv2500bq/bql and the at2500h/l, including the lack of extra grounds on p4 and p26. security fuse usage a single fuse is provided to prevent unauthorized copying of atf2500c fuse patterns. once programmed, the outputs will read programmed during verify. the security fuse should be programmed last, as its effect is immediate. the security fuse also inhibits preload and q2 observability. input and i/o pull-ups all atf2500c family members have programmable internal input and i/o pinkeeper circuits. the default condition, including when using the at2500cq/cql family to replace the at2500bq/bql or at2500h/l, is that the pinkeepers are not activated. when pinkeepers are active, inputs or i/os not being driven externally will maintain their last driven state. this ensures that all logic array inputs and device outputs are known states. pinkeepers are relatively weak active circuits that can be easily overridden by ttl-compatible drivers (see input and i/o diagrams below).
5 atf2500c family 0777g?12/01 input diagram i/o diagram functional logic diagram description the atf2500c functional logic diagram describes the interconnections between the input, feedback pins and logic cells. all interconnections are routed through the single global bus. the atf2500cs are straightforward and uniform plds. the 24 macrocells are numbered 0 through 23. each macrocell contains 17 and gates. all and gates have 172 inputs. the five lower product terms provide ar1, ck1, ck2, ar2, and oe. these are: one asynchronous reset and clock per flip-flop, and an output enable. the top 12 product terms are grouped into three sum terms, which are used as shown in the macrocell diagrams. eight synchronous preset terms are distributed in a 2/4 pattern. the first four macrocells share preset 0, the next two share preset 1, and so on, ending with the last two macrocells sharing preset 7. the 14 dedicated inputs and their complements use the numbered positions in the global bus as shown. each macrocell provides six inputs to the global bus: (left to right) feedback f2 (1) true and false, flip-flop q1 true and false, and the pin true and false. the positions occupied by these signals in the global bus are the six numbers in the bus diagram next to each macrocell. note: 1. either the flip-flop input (d/t2) or output (q2) may be fed back in the atf2500cs. input
6 atf2500c family 0777g?12/01 functional logic diagram atv2500c notes: 1. pin 4 and pin 26 are ?ground? connections and are not required for plcc, lcc and jlcc versions of atf2500cq or atf2500cql, making them compatible with atv2500h and atv2500l as well as atv2500bq and atv2500bql pinouts. 2. for dip package, vcc = p10 and gnd = p30. for, plcc, lcc and jlcc packages, vcc = p11 and p12, gnd1 = p33 and p34, and gnd2 = p4, p26 (see note 1, above).
7 atf2500c family 0777g?12/01 output logic, registered (1) output logic, combinatiorial (1) note: 1. these diagrams show equivalent logic functions, not necessarily the actual circuit implementation. note: 1. these four terms are shared with d/t1. clock option s2 = 0 terms in output configuration s1 s0 d/t1 d/t2 0084registered (q1); q2 fb 10124 (1) registered (q1); q2 fb 1184registered (q1); d/t2 fb s3 output configuration s6 q1 clock 0 active low 0 ck1 1 active high 1 ck1 pin1 s4 register 1 type s7 q2 clock 0d 0ck2 1t 1ck2 pin1 s5 register 2 type 0d 1t s2 = 1 terms in output configuration s5 s1 s0 d/t1 d/t2 x004 (1) 4 combinatorial (8 terms); q2 fb x0144 combinatorial (4 terms); q2 fb x104 (1) 4 (1) combinatorial (12 terms); q2 fb 1114 (1) 4 combinatorial (8 terms); d/t2 fb 01144 combinatorial (4 terms); d/t2 fb
8 atf2500c family 0777g?12/01 note: 1. typical values for nominal supply voltage. this parameter is only sampled and is not 100% tested. absolute maximum ratings* temperature under bias................................ -55c to +125c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent dam- age to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: 1. minimum voltage is -0.6v dc which may under- shoot to -2.0v for pulses of less than 20 ns. maximum output pin voltage is v cc + 0.75v dc which may overshoot to +7.0v for pulses of less than 20 ns. storage temperature ..................................... -65c to +150c junction temperature ............................................. 150c max voltage on any pin with respect to ground .........................................-2.0v to +7.0v (1) voltage on input pins with respect to ground during programming.....................................-2.0v to +14.0v (1) programming voltage with respect to ground .......................................-2.0v to +14.0v (1) dc and ac operating conditions commercial industrial military operating temperature 0c - 70c (ambient) -40c - 85c (ambient) -55c - 125c (case) v cc power supply 5v 5% 5v 10% 5v 10% pin capacitance f = 1 mhz, t = 25c (1) typ max units conditions c in 46pfv in = 0v c out 812pfv out = 0v test waveforms and measurement levels output test load
9 atf2500c family 0777g?12/01 ac waveforms (1) input pin clock ac waveforms (1) product term clock ac waveforms (1) combinatorial outputs and feedback note: 1. timing measurement reference is 1.5v. input ac driving levels are 0.0v and 3.0v, unless otherwise specified.
10 atf2500c 0777g?12/01 note: 1. see i cc versus frequency characterization curves. atf2500c dc characteristics symbol parameter condition min typ max units i il input load current v in = -0.1v to v cc + 1v 10 a i lo output leakage current v out = -0.1v to v cc + 0.1v 10 a i cc power supply current standby v cc = max, v in = gnd or v cc f = 0 mhz, outputs open atf2500c com. 110 190 ma ind., mil. 110 210 ma i os output short circuit current v out = 0.5v -120 ma v il input low voltage min v cc max -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.75 v v ol output low voltage v in = v ih or v il , v cc = 4.5v i ol = 8 ma com., ind. 0.5 v i ol = 6 ma mil. 0.5 v v oh output high voltage v cc = min i oh = -100 a v cc - 0.3 v i oh = -4.0 ma 2.4 atf2500c ac characteristics symbol parameter -10 -15 units minmaxminmax t pd1 input to non-registered output 10 15 ns t pd2 feedback to non-registered output 10 15 ns t pd3 input to non-registered feedback 6 11 ns t pd4 feedback to non-registered feedback 6 11 ns t ea1 input to output enable 10 15 ns t er1 input to output disable 10 15 ns t ea2 feedback to output enable 10 15 ns t er2 feedback to output disable 10 15 ns t aw asynchronous reset width 4 8 ns t ap asynchronous reset to registered output 13 18 ns t apf asynchronous reset to registered feedback 10 15 ns
11 atf2500c 0777g ? 12/01 atf2500c register ac characteristics, input pin clock symbol parameter -10 -15 units min max min max t cos clock to output 5.5 10 ns t cfs clock to feedback 0 2 0 5 ns t sis input setup time 2 9 ns t sfs feedback setup time 2 9 ns t hs hold time 0 0 ns t ws clock width 3 6 ns t ps clock period 8 12 ns f maxs external feedback 1/(t sis + t cos )7552mhz internal feedback 1/(t sfs + t cfs )10071mhz no feedback 1/(t ps )11083mhz t ars asynchronous reset/preset recovery time 5 12 ns atf2500c register ac characteristics, product term clock symbol parameter -10 -15 units min max min max t coa clock to output 10 15 ns t cfa clock to feedback 2 5 5 12 ns t sia input setup time 2 5 ns t sfa feedback setup time 2 5 ns t ha hold time 1 5 ns t wa clock width 3 7.5 ns t pa clock period 9 15 ns f maxa external feedback 1/(t sia + t coa )75.550mhz internal feedback 1/(t sfa + t cfa )10058mhz no feedback 1/(t ps )10066mhz t ara asynchronous reset/preset recovery time 2 8 ns
12 atf2500c 0777g ? 12/01 stand-by i cc vs. supply voltage (t a = 25 c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.5 4.8 5.0 5.3 5.5 supply voltage (v) i cc (a) tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. supply voltage (v oh = 2.4v) -50 -40 -30 -20 -10 0 4.0 4.5 5.0 5.5 6.0 supply voltage (v) i oh (ma) tbd output sink current vs. supply voltage (v ol = 0.5v) 0 0 0 1 1 1 4.0 4.5 5.0 5.5 6.0 supply voltage (v) iol (ma) tbd normalized i cc vs. temp 0.4 0.6 0.8 1.0 1.2 1.4 -40.0 0.0 25.0 75.0 temperature (c) normalized icc tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 0.200 0.400 0.600 0.800 1.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. output voltage (v cc = 5.0v, t a = 25 c) -90.0 -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 v oh (v) i oh (ma) tbd output sink current vs. output voltage (v cc = 5.0v, t a = 25 c) 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 supply voltage (v) i ol (ma) tbd
13 atf2500c 0777g ? 12/01 input clamp current vs. input voltage (v cc = 5.0v, t a = 35 c) -120 -100 -80 -60 -40 -20 0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 input voltage (v) input current (ma) tbd normalized t pd vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t pd tbd normalized t co vs. vcc 0.8 0.9 1.0 1.1 1.2 1.3 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t co tbd normalized t pd vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t pd tbd input current vs. input voltage (v cc = 5.0v, t a = 25 c) 0 0 0 1 1 1 0.01.02.03.04.05.06.0 input voltage (v) input current (ua) tbd normalized t pd vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (c) normalized t pd tbd normalized t co vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (v) normalized t co tbd normalized t su vs. temp 0.8 0.9 1.0 1.1 1.2 -40.0 0.0 25.0 75.0 temperature (c) normalized t co tbd
14 atf2500c 0777g ? 12/01 delta t pd vs. output loading -2 0 2 4 6 8 0 50 100 150 200 250 300 output loading (pf) delta t pd (ns) tbd delta t pd vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.02.03.04.05.06.07.08.09.010.0 number of outputs switching delta t pd (ns) tbd delta t co vs. output loading 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 50 100 150 200 250 300 number of outputs loading delta t co (ns) tbd delta t co vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 number of outputs switching delta t pd (ns) tbd
15 atf2500cl 0777g ? 12/01 note: 1. see i cc versus frequency characterization curves. atf2500cl dc characteristics symbol parameter condition min typ max units i il input load current v in = -0.1v to v cc + 1v 10 ? i lo output leakage current v out = -0.1v to v cc + 0.1v 10 ? i cc power supply current standby v cc = max, v in = gnd or v cc f = 0 mhz, outputs open atf2500cl com. 25 ma ind., mil. 210 ma i os output short circuit current v out = 0.5v -120 ma v il input low voltage min v cc max -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.75 v v ol output low voltage v in = v ih or v il , v cc = 4.5v i ol = 8 ma com., ind. 0.5 v i ol = 6 ma mil. 0.5 v v oh output high voltage v cc = min i oh = -100 ? v cc - 0.3 v i oh = -4.0 ma 2.4 atf2500cl ac characteristics symbol parameter -20 units min max t pd1 input to non-registered output 20 ns t pd2 feedback to non-registered output 20 ns t pd3 input to non-registered feedback 15 ns t pd4 feedback to non-registered feedback 15 ns t ea1 input to output enable 20 ns t er1 input to output disable 20 ns t ea2 feedback to output enable 20 ns t er2 feedback to output disable 20 ns t aw asynchronous reset width 12 ns t ap asynchronous reset to registered output 22 ns t apf asynchronous reset to registered feedback 19 ns
16 atf2500cl 0777g ? 12/01 atf2500cl register ac characteristics, input pin clock symbol parameter -20 units min max t cos clock to output 11 ns t cfs clock to feedback 0 6 ns t sis input setup time 14 ns t sfs feedback setup time 14 ns t hs hold time 0 ns t ws clock width 7 ns t ps clock period 14 ns f maxs external feedback 1/(t sis + t cos )40mhz internal feedback 1/(t sfs + t cfs )50mhz no feedback 1/(t ps ) 71 mhz t ars asynchronous reset/preset recovery time 15 ns atf2500cl register ac characteristics, product term clock symbol parameter -20 units min max t coa clock to output 20 ns t cfa clock to feedback 10 16 ns t sia input setup time 10 ns t sfa feedback setup time 8 ns t ha hold time 10 ns t wa clock width 11 ns t pa clock period 22 ns f maxa external feedback 1/(t sia + t coa )33mhz internal feedback 1/(t sfa + t cfa )38mhz no feedback 1/(t ps ) 45 mhz t ara asynchronous reset/preset recovery time 12 ns
17 atf2500cl 0777g ? 12/01 stand-by i cc vs. supply voltage (t a = 25 c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.5 4.8 5.0 5.3 5.5 supply voltage (v) i cc (a) tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. supply voltage (v oh = 2.4v) -50 -40 -30 -20 -10 0 4.0 4.5 5.0 5.5 6.0 supply voltage (v) i oh (ma) tbd output sink current vs. supply voltage (v ol = 0.5v) 0 0 0 1 1 1 4.04.55.05.56.0 supply voltage (v) iol (ma) tbd normalized i cc vs. temp 0.4 0.6 0.8 1.0 1.2 1.4 -40.0 0.0 25.0 75.0 temperature (c) normalized icc tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 0.200 0.400 0.600 0.800 1.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. output voltage (v cc = 5.0v, t a = 25 c) -90.0 -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 v oh (v) i oh (ma) tbd output sink current vs. output voltage (v cc = 5.0v, t a = 25 c) 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 supply voltage (v) i ol (ma) tbd
18 atf2500cl 0777g ? 12/01 input clamp current vs. input voltage (v cc = 5.0v, t a = 35 c) -120 -100 -80 -60 -40 -20 0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 input voltage (v) input current (ma) tbd normalized t pd vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t pd tbd normalized t co vs. vcc 0.8 0.9 1.0 1.1 1.2 1.3 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t co tbd normalized t su vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t su tbd input current vs. input voltage (v cc = 5.0v, t a = 25 c) 0 0 0 1 1 1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 input voltage (v) input current (ua) tbd normalized t co vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (v) normalized t co tbd normalized t su vs. temp 0.8 0.9 1.0 1.1 1.2 -40.0 0.0 25.0 75.0 temperature (c) normalized t co tbd normalized t su vs. temp 0.8 0.9 1.0 1.1 1.2 -40.0 0.0 25.0 75.0 temperature (c) normalized t co tbd
19 atf2500cl 0777g ? 12/01 delta t pd vs. output loading -2 0 2 4 6 8 0 50 100 150 200 250 300 output loading (pf) delta t pd (ns) tbd delta t pd vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.02.03.04.05.06.07.08.09.010.0 number of outputs switching delta t pd (ns) tbd delta t co vs. output loading 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 50 100 150 200 250 300 number of outputs loading delta t co (ns) tbd delta t co vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 number of outputs switching delta t pd (ns) tbd
20 atf2500cq 0777g ? 12/01 note: 1. see i cc versus frequency characterization curves. atf2500cq dc characteristics symbol parameter condition min typ max units i il input load current v in = -0.1v to v cc + 1v 10 ? i lo output leakage current v out = -0.1v to v cc + 0.1v 10 ? i cc power supply current standby v cc = max, v in = gnd or v cc f = 0 mhz, outputs open atf2500cq com. 30 70 ma ind., mil. 30 85 ma i os output short circuit current v out = 0.5v -120 ma v il input low voltage min v cc max -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.75 v v ol output low voltage v in = v ih or v il , v cc = 4.5v i ol = 8 ma com., ind. 0.5 v i ol = 6 ma mil. 0.5 v v oh output high voltage v cc = min i oh = -100 ? v cc - 0.3 v i oh = -4.0 ma 2.4 atf2500cq ac characteristics symbol parameter -20 units min max t pd1 input to non-registered output 20 ns t pd2 feedback to non-registered output 20 ns t pd3 input to non-registered feedback 15 ns t pd4 feedback to non-registered feedback 15 ns t ea1 input to output enable 20 ns t er1 input to output disable 20 ns t ea2 feedback to output enable 20 ns t er2 feedback to output disable 20 ns t aw asynchronous reset width 12 ns t ap asynchronous reset to registered output 22 ns t apf asynchronous reset to registered feedback 19 ns
21 atf2500cq 0777g ? 12/01 atf2500cq register ac characteristics, input pin clock symbol parameter -20 units min max t cos clock to output 11 ns t cfs clock to feedback 0 6 ns t sis input setup time 14 ns t sfs feedback setup time 14 ns t hs hold time 0 ns t ws clock width 7 ns t ps clock period 14 ns f maxs external feedback 1/(t sis + t cos )40mhz internal feedback 1/(t sfs + t cfs )50mhz no feedback 1/(t ps )71mhz t ars asynchronous reset/preset recovery time 15 ns atf2500cq register ac characteristics, product term clock symbol parameter -20 units min max t coa clock to output 20 ns t cfa clock to feedback 10 16 ns t sia input setup time 10 ns t sfa feedback setup time 8 ns t ha hold time 10 ns t wa clock width 11 ns t pa clock period 22 ns f maxa external feedback 1/(t sia + t coa )33mhz internal feedback 1/(t sfa + t cfa )38mhz no feedback 1/(t ps )45mhz t ara asynchronous reset/preset recovery time 12 ns
22 atf2500cq 0777g ? 12/01 stand-by i cc vs. supply voltage (t a = 25 c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.5 4.8 5.0 5.3 5.5 supply voltage (v) i cc (a) tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. supply voltage (v oh = 2.4v) -50 -40 -30 -20 -10 0 4.0 4.5 5.0 5.5 6.0 supply voltage (v) i oh (ma) tbd output sink current vs. supply voltage (v ol = 0.5v) 0 0 0 1 1 1 4.04.55.05.56.0 supply voltage (v) iol (ma) tbd normalized i cc vs. temp 0.4 0.6 0.8 1.0 1.2 1.4 -40.0 0.0 25.0 75.0 temperature (c) normalized icc tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 0.200 0.400 0.600 0.800 1.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. output voltage (v cc = 5.0v, t a = 25 c) -90.0 -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 v oh (v) i oh (ma) tbd output sink current vs. output voltage (v cc = 5.0v, t a = 25 c) 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 supply voltage (v) i ol (ma) tbd
23 atf2500cq 0777g ? 12/01 input clamp current vs. input voltage (v cc = 5.0v, t a = 35 c) -120 -100 -80 -60 -40 -20 0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 input voltage (v) input current (ma) tbd normalized t pd vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t pd tbd normalized t co vs. vcc 0.8 0.9 1.0 1.1 1.2 1.3 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t co tbd normalized t su vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t su tbd input current vs. input voltage (v cc = 5.0v, t a = 25 c) 0 0 0 1 1 1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 input voltage (v) input current (ua) tbd normalized t co vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (v) normalized t co tbd normalized t co vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (v) normalized t co tbd normalized t su vs. temp 0.8 0.9 1.0 1.1 1.2 -40.0 0.0 25.0 75.0 temperature (c) normalized t co tbd
24 atf2500cq 0777g ? 12/01 delta t pd vs. output loading -2 0 2 4 6 8 0 50 100 150 200 250 300 output loading (pf) delta t pd (ns) tbd delta t pd vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 number of outputs switching delta t pd (ns) tbd delta t co vs. output loading 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 50 100 150 200 250 300 number of outputs loading delta t co (ns) tbd delta t co vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 number of outputs switching delta t pd (ns) tbd
25 atf2500cql 0777g ? 12/01 atf2500cql dc characteristics symbol parameter condition min typ max units i il input load current v in = -0.1v to v cc + 1v 10 ? i lo output leakage current v out = -0.1v to v cc + 0.1v 10 a i cc power supply current standby v cc = max, v in = gnd or v cc f = 0 mhz, outputs open atf2500cql com. 2 4 ma ind., mil. 2 5 ma i os output short circuit current v out = 0.5v -120 ma v il input low voltage min v cc max -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.75 v v ol output low voltage v in = v ih or v il , v cc = 4.5v i ol = 8 ma com., ind. 0.5 v i ol = 6 ma mil. 0.5 v v oh output high voltage v cc = min i oh = -100 a v cc - 0.3 v i oh = -4.0 ma 2.4 atf2500cql ac characteristics symbol parameter -25 units min max t pd1 input to non-registered output 25 ns t pd2 feedback to non-registered output 25 ns t pd3 input to non-registered feedback 18 ns t pd4 feedback to non-registered feedback 18 ns t ea1 input to output enable 25 ns t er1 input to output disable 25 ns t ea2 feedback to output enable 25 ns t er2 feedback to output disable 25 ns t aw asynchronous reset width 15 ns t ap asynchronous reset to registered output 28 ns t apf asynchronous reset to registered feedback 25 ns
26 atf2500cql 0777g ? 12/01 atf2500cql register ac characteristics, input pin clock symbol parameter -25 units min max t cos clock to output 12 ns t cfs clock to feedback 0 7 ns t sis input setup time 20 ns t sfs feedback setup time 20 ns t hs hold time 0ns t ws clock width 8ns t ps clock period 146 ns f maxs external feedback 1/(t sis + t cos )31mhz internal feedback 1/(t sfs + t cfs )37mhz no feedback 1/(t ps ) 62 mhz t ars asynchronous reset/preset recovery time 20 ns atf2500cql register ac characteristics, product term clock symbol parameter -25 units min max t coa clock to output 22 ns t cfa clock to feedback 12 18 ns t sia input setup time 15 ns t sfa feedback setup time 10 ns t ha hold time 12 ns t wa clock width 14 ns t pa clock period 28 ns f maxa external feedback 1/(t sia + t coa )27mhz internal feedback 1/(t sfa + t cfa )36mhz no feedback 1/(t ps ) 36 mhz t ara asynchronous reset/preset recovery time 15 ns
27 atf2500cql 0777g ? 12/01 stand-by i cc vs. supply voltage (t a = 25 c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.5 4.8 5.0 5.3 5.5 supply voltage (v) i cc (a) tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency ( mhz ) i cc (ma) tbd output source current vs. supply voltage (v oh = 2.4v) -50 -40 -30 -20 -10 0 4.0 4.5 5.0 5.5 6.0 supply voltage (v) i oh (ma) tbd output sink current vs. supply voltage (v ol = 0.5v) 0 0 0 1 1 1 4.0 4.5 5.0 5.5 6.0 supply voltage (v) iol (ma) tbd normalized i cc vs. temp 0.4 0.6 0.8 1.0 1.2 1.4 -40.0 0.0 25.0 75.0 temperature (c) normalized icc tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 0.200 0.400 0.600 0.800 1.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. output voltage (v cc = 5.0v, t a = 25 c) -90.0 -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 v oh (v) i oh (ma) tbd output sink current vs. output voltage (v cc = 5.0v, t a = 25 c) 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 supply voltage (v) i ol (ma) tbd
28 atf2500cql 0777g ? 12/01 input clamp current vs. input voltage (v cc = 5.0v, t a = 35 c) -120 -100 -80 -60 -40 -20 0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 input voltage (v) input current (ma) tbd normalized t pd vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t pd tbd normalized t co vs. vcc 0.8 0.9 1.0 1.1 1.2 1.3 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t co tbd normalized t su vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t su tbd input current vs. input voltage (v cc = 5.0v, t a = 25 c) 0 0 0 1 1 1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 input voltage (v) input current (ua) tbd normalized t pd vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (c) normalized t pd tbd normalized t co vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (v) normalized t co tbd normalized t su vs. temp 0.8 0.9 1.0 1.1 1.2 -40.0 0.0 25.0 75.0 temperature (c) normalized t co tbd
29 atf2500cql 0777g ? 12/01 delta t pd vs. output loading -2 0 2 4 6 8 0 50 100 150 200 250 300 output loading (pf) delta t pd (ns) tbd delta t pd vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 number of outputs switching delta t pd (ns) tbd delta t co vs. output loading 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 50 100 150 200 250 300 number of outputs loading delta t co (ns) tbd delta t co vs. # of output switching 0.0 0.2 0.4 0.6 0.8 1.0 1.02.03.04.05.06.07.08.09.010.0 number of outputs switching delta t co (ns) tbd
30 atf2500cql 0777g ? 12/01 ordering information t pd (ns) t cos (ns) ext. f maxs (mhz) ordering code package operation range 120 5.5 75 ATF2500C-10JC 44j commercial 15 10 52 atf2500c-15jc 44j commercial (0 c to 70 c) atf2500c-15ji 44j industrial (-40 c to 85 c) atf2500c-15km/883 atf2500c-15nm/883 44k 44l military/883c (-55 c to 125 c) class b, fully compliant 5962 - 0152201m4x 5962 - 0152201m3x 44k 44l military/883c (-55 c to 125 c) class b, fully compliant 20 11 40 atf2500cl-20jc 44j commercial (0 c to 70 c) atf2500cl-20ji 44j industrial (-40 c to 85 c) atf2500cl-20km/883 atf2500cl-20nm/883 44k 44l military/883c (-55 c to 125 c) class b, fully compliant 5962 - 0152202m4x 5962 - 0152202m3x 44k 44l military/883c (-55 c to 125 c) class b, fully compliant 20 11 40 atf2500cq-20jc atf2500cq-20pc 44j 40p6 commercial (0 c to 70 c) atf2500cq-20ji atf2500cq-20pi 44j 40p6 industrial (-40 c to 85 c) atf2500cq-20gm/883 atf2500cq-20km/883 atf2500cq-20nm/883 40d6 44k 44l military/883c (-55 c to 125 c) class b, fully compliant 5962 - 0152203m2x 5962 - 0152203m4x 5962 - 0152203m3x 40d6 44k 44l military/883c (-55 c to 125 c) class b, fully compliant
31 atf2500cql 0777g ? 12/01 note: *smd numbers are tbd. using ? c ? product for industrial to use commercial product for industrial temperature ranges, down-grade one speed grade from the ? i ? to the ? c ? device (7 ns ? c ? = 10 ns ? i ? ) and derate power by 30%. 25 12 31 atf2500cql-25jc atf2500cql-25pc 44j 40p6 commercial (0 c to 70 c) atf2500cql-25ji atf2500cql-25pi 44j 40p6 industrial (-40 c to 85 c) atf2500cql-25gm/883 atf2500cql-25km/883 atf2500cql-25nm/883 40d6 44k 44l military/883c (-55 c to 125 c) class b. fully compliant 5962 - 0152204m2x 5962 - 0152204m4x 5962 - 0152204m3x 40d6 44k 44l military/883c (-55 c to 125 c) class b, fully compliant ordering information (continued) t pd (ns) t cos (ns) ext. f maxs (mhz) ordering code package operation range package type 40d6 40-pin, 0.600" wide, ceramic, dual inline package (cerdip) 44j 44-lead, plastic j-leaded chip carrier otp (plcc) 44k 44-lead, ceramic j-leaded chip carrier (jlcc) 40p6 40-pin, 0.600" wide, plastic, dual inline package otp (pdip) 44l 44-pad, ceramic leadless chip carrier (lcc)
32 atf2500cql 0777g ? 12/01 packaging information 40d6 ? cerdip 53.09(2.090) 51.82(2.040) pin 1 15.49(0.610) 12.95(0.510) 0.127(0.005)min 1.78(0.070) 0.38(0.015) 0.66(0.026) 0.36(0.014) 1.65(0.065) 1.14(0.045) 15.70(0.620) 15.00(0.590) 17.80(0.700) max 0.46(0.018) 0.20(0.008) 2.54(0.100)bsc 5.08(0.200) 3.18(0.125) seating plane 5.72(0.225) max 48.26(1.900) ref 0 o ~ 15 o ref dimension in millimeters and (inches) controlling dimension: inches 04/11/01 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 40d6 , 40-lead (0.600" wide), non-windowed, ceramic dual inline package (cerdip) a 40d6 mil-std-1835 d-5 config a (glass sealed)
33 atf2500cql 0777g ? 12/01 44j ? plcc 1.14(0.045) x 45? pin no. 1 identifier 1.14(0.045) x 45? 0.51(0.020)max 0.318(0.0125) 0.191(0.0075) a2 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 44j , 44-lead, plastic j-leaded chip carrier (plcc) b 44j 10/04/01 45? max (3x) notes: 1. this package conforms to jedec reference ms-018, variation ac. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is .010"(0.254 mm) per side. dimension d1 and e1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. lead coplanarity is 0.004" (0.102 mm) maximum. common dimensions (unit of measure = mm) symbol min nom max note a 4.191 4.572 a1 2.286 3.048 a2 0.508 d 17.399 17.653 d1 16.510 16.662 note 2 e 17.399 17.653 e1 16.510 16.662 note 2 d2/e2 14.986 16.002 b 0.660 0.813 b1 0.330 0.533 e 1.270 typ a a1 b1 d2/e2 b e e1 e d1 d
34 atf2500cql 0777g?2/01 44k ? jlcc symbol min nom max note a 3.93 4.36 4.57 2.28 2.66 3.04 a1 e e1 16.38 16.63 16.89 d1 d a2 0.89 - 1.14 17.40 17.52 17.65 d2 15.00 15.50 16.00 1.14 x 45? 0.89 x 45? .025(.635) radius max (3x) d d1 e1 e b e b1 e2 a2 a1 a d2 e2 b b1 c 17.40 17.52 17.65 16.38 16.63 16.89 15.00 15.50 16.00 e 1.27 ty p 0.66 0.73 0.81 0.43 - 0.58 0.15 - 0.30 c note : refer to mil-std-1835c-j1 0.20 c seating plane c common dimensions (unit of measure = mm) 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 09/18/01 44k , 44-lead, non-windowed, ceramic j-leaded chip carrier (jlcc) a 44k
35 atf2500cql 0777g?2/01 40p6 ? pdip 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 40p6 , 40-lead (0.600"/15.24 mm wide) plastic dual inline package (pdip) b 40p6 09/28/01 pin 1 e1 a1 b ref e b1 c l seating plane a 0 ~ 15 d e eb common dimensions (unit of measure = mm) symbol min nom max note a 4.826 a1 0.381 d 52.070 52.578 note 2 e 15.240 15.875 e1 13.462 13.970 note 2 b 0.356 0.559 b1 1.041 1.651 l 3.048 3.556 c 0.203 0.381 eb 15.494 17.526 e 2.540 typ notes: 1. this package conforms to jedec reference ms-011, variation ac. 2. dimensions d and e1 do not include mold flash or protrusion. mold flash or protrusion shall not exceed 0.25 mm (0.010").
36 atf2500cql 0777g?2/01 44l ? lcc 16.81(0.662) 16.26(0.640) 16.81(0.662) 16.26(0.640) 2.74(0.108) 2.16(0.085) 2.03(0.080) 1.40(0.055) index corner 0.635(0.025) 0.381(0.015) x 45 ? 0.305(0.012) 0.178(0.007) radius 0.737(0.029) 0.533(0.021) 1.02(0.040) x 45 ? pin 1 1.40(0.055) 1.14(0.045) 2.41(0.095) 1.91(0.075) 2.16(0.085) 1.65(0.065) 12.70(0.500) bsc 1.27(0.050) typ 12.70(0.500) bsc dimensions in millimeters and (inches) controlling dimension: inches 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 44l , 44-pad (0.600" wide), non-windowed, ceramic lid, leadless chip carrier (lcc) a 44l 04/11/01 mil-std-1835 c-5
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